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ARM Selects XJTAG for RealView Development Tools Debug and Test

CAMBRIDGE, England--XJTAG today announced that ARM (LSE:ARM) (Nasdaq:ARMHY) has selected the XJTAG boundary scan development system to improve and speed up the process of debugging and testing its range of ARM(R) RealView(R) development hardware tools, which include high-density, multi-layer development boards.

ARM is currently using XJTAG on its latest generation of RealView platform baseboards, which contain multiple high pin-count ball grid array (BGA) devices including processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs).

Spencer Saunders, engineering manager, platforms, System Design Division, ARM, said: "With tens of thousands of pins on each board, we recognised that it would not be possible to validate these circuits in a commercially realistic timescale without the use of a boundary scan test system. After evaluating the different competitive options, we selected the XJTAG boundary scan system due to its power, performance, versatility and cost effectiveness."

The XJTAG system has enabled ARM to speed up the process of debug and test, get test coverage up to the 90 percent mark, achieve its ten-minutes-per-board boundary scan production test target, and to significantly improve production yields.

Simon Payne, CEO at XJTAG, said: "We are delighted that ARM, the world's leading semiconductor intellectual property (IP) supplier, has selected the XJTAG system. With XJTAG, ARM engineers now have a boundary scan system that allows tests to be recorded, refined and repeatedly re-used throughout the development cycle both by its in-house team and contract manufacturing partners."

ARM has developed a strong base of development tools, software and hardware products to support its system-on-chip IP. Its range of RealView development solutions are ideal systems for customers prototyping ARM processor-based products and are suitable for architecture and CPU evaluation, hardware and software development, and ASIC emulation.

XJTAG's built-in design-for-test (DFT) functionality has enabled ARM to use the boundary scan system right from the very beginning of the development process to help improve the design and reduce respins. "XJTAG has saved ARM a great deal of time as it automatically handles any netlist changes by adapting to the new circuit connections, thereby avoiding the time-consuming process of manually picking through the netlist for errors," added Joao De Oliveira, VP of business development at XJTAG.

The XJTAG development system is a cost-effective 'out-of-the-box' solution for debugging, testing and servicing electronic printed circuits boards and systems throughout the product lifecycle. The XJTAG system reduces the time and cost of board development and prototyping by allowing early test development, early design validation of CAD netlists, fast generation of highly functional tests and test re-use across circuits using the same devices.

For more information about the XJTAG system, please telephone +44 (0) 1954 213888, facsimile +44 (0) 1954 211565 or email enquiries@xjtag.com. Alternatively visit www.xjtag.com.

An extended version of this news release, along with photography, is available for download at: http://www.xjtag.com/press-releases.php

ARM and RealView are registered trademarks of ARM Limited. All other brands or product names are the property of their respective holders. "ARM" is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; AXYS Design Automation Inc.; AXYS GmbH; ARM Embedded Solutions Pvt. Ltd.; and ARM Physical IP, Inc.; and ARM Norway AS.

Contacts

Martin Brooke Associates for XJTAG
Martin Brooke, +44 (0) 1223 244500
martin.brooke@mba-pr.com

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